Foundry

The term foundry originally was a synonym for a steel mill or general metal works where metal casting operations were performed. It also referred to a font-design company, since they traditionally fabricated the metal molds used in printing presses. In the 1980s, the term foundry came to be associated with contracted semiconductor manufacturing. (The rest of this article focuses on foundry in the context of the semiconductor industry.)

Contents

Overview

The foundry model was a business vision, built on the separation of two key activities of (integrated circuit) IC-development: the electronic design process, and the manufacturing (fabrication) of physical devices. In the foundry model, a high-tech company without any semiconductor manufacturing capabaility (called the fabless company) orders wafer-production from a manufacturer (called the merchant foundry.) The fabless design-company concentrates solely on the electronic research and development of a IC-product, while the foundry concentrates solely on the aspect of fabricating and testing the physical product.

The foundry model was made possible by (1) advances in electronic design automation (EDA), which gave circuit designers the ability to not just capture and describe large schematics, but also exchange that design-data with other designers using different foundries, and (2) advances in assembly-line production of large-scale-integerated (LSI) semiconductors. For the operator of the fab, who must design and sell as many ICs as possible, unpredictable fluctuations in demand along with lengthening product development cycles led to inevitable periods of idle. Under-utilization, as it was called, could lead to the financial ruin of the owner, so selling surplus wafer-capacity was a way to maximize the fab's utilization. Hence, economic factors created a climate where fab-operators wanted to sell surplus wafer-manufacturing capacity, and designers wanted to purchase manufacturing-capacity rather than try to build it.

The foundry model represents a milestone in the high-tech industry. A semiconductor design firm can avoid the enormous capital investment and recurring expense associated with building and maintaining a fab. This has given rise to a landscape of successful fabless high-tech companies (which outsource all chip-production to other merchants), design services companies (which sell expertise on design and implementation topics), and dedicated semiconductor foundries (which fuel the entire industry with raw wafer-production capacity.) As the high-tech industry continues to expand and evolve, it is likely the market will support an increasing level of specialization and niche companies. There are already examples of the virtual corporation, in the form of semiconductor intellectual-property (IP) vendors.

The terms 'fabless' and 'merchant' are not absolute for a given company. Instead, the terms have come to refer to a party's role in the context of IC-manufacturing, on a product-by-product basis. Consider LSI Logic. As a IC supplier, LSI has an extensive product-line of both general-purpose logic and application-specific chips. LSI owns its own fab, for which it also sells surplus capacity, (making LSI a 'wafer supplier', as well.) With a fabless customer, LSI assumes the role of a merchant-foundry. However, for cost reasons, LSI also purchases finished wafers from other merchant-foundries (such as TSMC and SMIC), which relegates LSI to a 'fabless' role. Finally, the majority of LSI's extensive IC product-line are internally-developed and built, promoting LSI to the role of a traditional integrated device manufacturer (IDM.)

History

At the dawn of the IC-industry, the privilege of selling IC-products was reserved for the few companies that gained mastery of every aspect of the product's development: research, design, manufacturing, and test. The vast majority of IC-products were sold by companies who pioneered basic research in transistors and envisioned useful applications for them. Such an undertaking required the company to possess the ability to design, manufacture, and test ICs, making the IC-vendor a complete, self-contained entity as far as IC-development was concerned. Out on the frontier of electronics technology, there were few standards for design-capture, manufacturing, or testing -- each designer was responsible for the entire development flow. Suffice it to say, even if a designer could find another company willing to build his product, it was difficult to exchange design-data between different fabs, as a circuit-schematics of the day typically contained proprietary (and hence non-portable) circuit elements tied to the specifics of the original designer's fabrication facility (fab.)

With the rapid pace of technological advances (foreseen by Moore's Law), the cost of operating a fab had become a multi-million dollar proposition. The continuing pace of development ensured no relief from these spiralling costs, which burdened even the largest corporations and threatened to altogether cutoff smaller high-tech firms from the IC-industry. The very first foundries were part of the MOSIS service. The MOSIS service gave limited production-access to designers with limited means, such as students and researchers at a universities, or engineers at a small startup. The designer submit his design (schematics for a single IC-die.) These submissions were piggy-backed on manufacturing lots of commercial manufacturers like Intersil with a single wafer in the manufacturing boat being a MOSIS wafer and the rest being the company's commercial product.

Although MOSIS opened the doors to some fabless customers, running a business around MOSIS production was difficult. First, the merchant foundries sold wafer-capacity on a surplus basis, as a secondary business activity. As every merchant had its own internal production-commitments to fulfill, tbe (external) fabless customer had little hope for a stable, guaranteed capacity source. Second, the choice of merchant dictated the design/development flow of the fabless customer. Foundries rarely released detailed design-kits (which were considered industry secrets) in advance, and when they did, often subjected the customer to secret, proprietary, and non-portable conversion/preparation steps. The wise designer weighed the choice of foundry early in the design process, as the foundry in question usually determined the technical feasibility and design strategy of large chips.

As the complexity of circuits increased, the design-industry moved away from low-level schematic-capture toward hardware design languages (such as VHDL and Verilog.) The adoption of these languages not only increased designer productivity, they improved the portability of designs. Design portability allowed designers greater freedom in selecting a merchant foundry, but the issue of guaranteed-capacity would remain an open issue until the advent of the dedicated merchant foundry.

In 1987, the world's first dedicated merchant foundry openned its doors, Taiwan Semiconductor Manufacturing Company (TSMC). The distinction of 'dedicated' is in reference to the typical merchant foundry of the era, whose primary business activity was building and selling of its own IC-products. The dedicated foundry offers several key advantages to its customers: First, it does not sell finished IC-products into the suppply channel, thus a dedicated-foundry will never compete directly with its fabless customers (a common concern for them.) Second, the dedicated foundry can scale production-capacity to a customer's needs; TSMC offers low-quantity shuttle-services in addition to full production-lines. Finally, the dedicated foundry offers a "COT-flow" (customer owned tooling) based on industry-standard EDA-systems, whereas many IDM merchants required its customers to use proprietary (non-portable) development-tools. The COT advantage gave the customer complete control over the design-process, from concept to mask-ready status.

UMC, TSMC's closest competitor, is sometimes called a virtual IDM, due to their ownership of and involvement in other Taiwanese design-firms.

By the 1990s, transistor miniaturization reached the level where designers could experiment with a system-level design approach: the system-on-a-chip (SOC). The term SOC refers to a single-IC product which combines the functions of multiple ICs into a single chip. The single-chip SOC reduces not only space and cost (both critical design parameters for mobile applications), but also increases reliability due to the reduction of mechanical contacts on the finished product. Designing an SOC requires a designer to work at a higher level of abstraction than the traditional circuit-designer ("the forest versus the trees.") Leveraging complete and pre-verified functional blocks (called "IP-cores"), the SOC-designer focuses his attention on system-level and integration issues. Analogous to design-reuse in the software industry, SOC-development improved productivity by allowing predesigned blocks to be used multiple times by different designers, with the only requirement of re-verification.

As SOCs continue to increase in size and complexity, reusuable-IP will likely grow beyond its current niche market. Many IPs are the order of complexity of standalone chips, representing the effort of an entire design team: LAN controllers, USB controller, PCI interface, ADCs, DACs, microcontrollers, wireless transceivers, programmable logic, RAM, Flash ROM, etc. For the SOC-designer, reusable-IP allows 1 engineer to reuse the work of 100 engineers; it is perhaps the only practical way to build a networked consumer-device in reasonable time. For the merchant-foundry, reusable-IP can not only lure new customers (for highly-specialized, rare IP-cores), they can lock the customer to the merchant. Foundry-developed IPs are rarely made available for competitor fabs, and even independently-developed IP-cores can only be targeted to a narrow range of fabs.

Ongoing issues

Like all industries, the semiconductor-industry faces upcoming challenges and obstacles.

The cost to stay on the leading-edge, has steadily increased with each generation of chips. The financial strain is being felt by both large merchant foundries and their fabless customers. Foundries face increasing costs to stay in business. The cost of a 300mm wafer plant exceeds $1 billion US dollars. Many of the foundry-industry's top players (including UMC) have pursued joint-ventures with their competitors, in an effort to split R&D expenditures and fab-maintenance expenses. In an EETimes interview, an executive of NVidia stated that the cumulative cost of developing an unnamed Geforce product exceeded $100 million US dollars. To assist their customers, foundries are offering them more design consulting services and IP-cores.

Security issues continue to hamper all aspects of the foundry business. In the 1980s, there were rumored incidents of design-theft, where the employee of a foundry (perhaps acting his employer's behalf) stole design-schematics from a customer order. Stolen data is rarely copied, because blatant copies are easily identified by fingerprints in the chip's photomask (either due to designer's due diligence, or as a byproduct of the design/manufacturing process.) However, the data may be sold to a competitor, who may shave months or years from tedious reverse-engineering. The IP-market, by virtue of an IP-core's portable and re-usable nature, is especially vulnerable to theft.

See also

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