Latch

The latch is a electronic circuit used to store information in asynchronous sequential logic systems. One latch can store one bit of information. Latches often occur in multiples, some of which have special names, such as the 'quad latch' (which can store four bits) and the 'octal latch' (eight bits).

SR latch

Missing image
Sr-latch.png
SR latch
The simplest latch is the SR latch, where S and R stand for 'set' and 'reset'. The latch is constructed from a pair of cross-coupled NAND (negative AND) logic gates. The stored bit is present on the output marked <math>Q<math>.

Normally, in storage mode, the <math>\bar S<math> and <math>\bar R<math> inputs are both low, and feedback maintains the <math>Q<math> and <math>\bar Q<math> outputs in a constant state, with <math>\bar Q<math> the complement of Q. If <math>\bar S<math> (set) is pulsed low while <math>\bar R<math> is held high, then the <math>Q<math> output is forced high, and stays high when <math>\bar S<math> returns high. On the other hand, if <math>\bar R<math> (reset) is pulsed low while <math>\bar S<math> is held high, then the <math>Q<math> output is forced low, and stays low when <math>\bar R<math> returns high. The output of the latch cannot be predicted if <math>\bar S<math> and <math>\bar R<math> are brought high at the same time, so this condition must be avoided.

See also

de:Latch it:Latch

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